Electrical power for operating a wide variety of electronic circuit-based products, such as portable and hand-held devices including notebook computers, personal digital assistants, cell phones, and the like, is typically supplied by one or more direct current (DC) power sources, including rechargeable, single-cell batteries. As one would expect, the ongoing demand for increased functionality and longer run time of these battery-powered products has led to the development of power conservation mechanisms, that either sense or are informed that the electronic device is not being actively used, and then take action to reduce power consumption.
As a non-limiting example, the power control circuitry of a laptop computer will customarily transition the computer's power supply from ‘active’ mode to ‘sleep’ or ‘quiescent’ mode of operation, when the user closes the display lid or fails to manipulate an input/output device within some prescribed period time. During this effectively inactive or idle state, an auxiliary power supply within the power control circuitry functions to keep only essential portions of the operational capability of the computer active, so as to minimize power consumption. Subsequently, in response to the user reinitiating use of the device, the power conservation circuit switches back to the main supply, which customarily is configured as a pulse width modulator-based DC—DC converter architecture.
In order to prevent misoperation of the powered device, it is imperative that transitioning between quiescent and active modes be effectively free of power rail anomalies that might otherwise affect the (binary) state of operation of a powered circuit device, such as a memory cell. One circuit where this problem occurs is shown in FIG. 1, which depicts an error amplifier 10 for a pulse width modulator (PWM)-based DC—DC converter having PWM driver circuitry 20 that drives output circuitry 40. The output circuitry typically contains an inductor 41 coupled between the driver 20 and an output node 43 to which a load 45 and a capacitor 47, each referenced to ground (GND) are coupled. The voltage at the output node is fed back, via link 48 to an inverting (−) input 11 of the error amplifier, to the non-inverting (+) input 12 of which an input voltage Vin is coupled.
Link 48 is further coupled the inverting (−) input 51 of an auxiliary, sleep or quiescent mode amplifier 50, to the non-inverting (+) input 52 of which the input voltage Vin is coupled. The output 53 of amplifier 50 is coupled to the output node 43. Error amplifier 10 is enabled by a RUN mode command coupled to its RUN mode enable input 14, while auxiliary amplifier 50 is enabled by a SLEEP mode command coupled to its SLEEP mode enable input 54. The particular area of concern involves an AC compensation RC filter 30 that is customarily installed between the output 13 and an input 11 of error amplifier 10. RC filter 30 may comprise a capacitor 31 and a resistor 32 coupled in circuit between the output 13 and input 11 of error amplifier 10, and a resistor 33 referenced to GND, as shown.
During normal operation or ‘RUN’/‘ACTIVE’ mode, some charge is stored across an RC filter capacitor 31 as the feedback loop through the error amplifier 10 supplies a control input to the PWM driver circuitry 20. When the power supply transitions from active mode to ‘SLEEP’/‘QUIESCENT’ mode, however, this charge begins to bleed off or discharge through the filter's resistor circuitry, as the normal operation of the error amplifier 10 and the PWM circuit 20 is temporarily interrupted. Eventually, when the power supply transitions out of QUIESCENT mode and back into RUN mode, the discharged capacitor 31 will take some finite amount of time to recharge as the PWM driver circuitry 20 is again active. During this interval, the output node 43 provides a voltage that is different from the correct value and appears to downstream powered devices as a power rail anomaly, which can cause misoperation of one or more devices.